I need to shorten the HSYNC pulse and have tried doing so by altering register 0x23 which is the HSYNC duration, but nothing happens to the signal, it stays 5us wide. I can however change the duration on VSYNC...
I don't know if the above has anything to do with my real problem which is that my picture on the display has ended up on the right side only showing like one column of pixels. It says in the display datasheet that the HSYNC needs to be around one clock cycle wide and that VSYNC should be twice that wide, so that is why I suspect that the sync signals might be the problem... What else could be the issue when the picture has slided to the right side?
To describe my setup: I use AD9398 as a HDMI receiver connected to a PC, I DA-convert the RGB signals from the AD9398 before I send them to the display.