This post is regarding sending our own data from an external audio codec to the Kintex-7 FPGA kit and then to the ad-fmcomms1 with NO-OS support. Go through the various threads with similar content I have planned to proceed in the following way:
1) Disconnect the DDS blocks in the AD9122 PCORE.
2) My own audio data from the codec which has been processed in the FPGA (say FIR filtering) will be converted into an IP core.
3) Then my custom IP core should have a FIFO interface to the AD9122 PCORE where my IP core should be sending data to the FIFO interface which in turn will send 64 bits of data in one 'dac_clk_div' clock cycle which turns out be 125 MHz to the PCORE. Inside the PCORE the 64 bits of data ( 'I' sample) goes to the SERDES which will serialize the data and send 16 bits of data at 'dac_clk' clock rate which is 500 MHz to the DAC.
My doubt is regarding point 3. Have I have understood the functioning of the AD9122 PCORE correctly by going through the materials and various answered questions in the forum?
Once this is done what other changes have to be made especially in the 'C' code?