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AD9951 SPI data sheet error?

Question asked by Diamondjimkoehler on Dec 9, 2015
Latest reply on Dec 9, 2015 by KennyG



     On page 22 of the current data sheet, the second paragraph, top right, says that when in the MSB mode, the data register first accessed is the most significant byte, followed by the next significant byte, etc, etc.  However, in the 'Example Operation' just below this, the example of the ASF register, it says that the first byte is written to internal register 0x07 followed by internal register 0x08.


     Isn't this example the wrong way round?  I would have thought that the internal registers should be first 0x08, then 0x07.