CFG register contains RB bits. How to use it? How to read the configuration?
Contents of the configuration register can be read back by writing CFG = 0. There are notes under the general timing diagrams to have a total of 28 SCK falling edges (Figure 36 - without Busy Indicator) or 29 SCK falling edges (Figure 37 - with Busy Indicator) when CFG readback is enabled to return SDO to high-Z.
Hi Karen, thanks for the reply. I tried to pass as a configuration 0x3fc4 and 0x3c46 and in both cases shall be deducted from the value of one of the analog channels. The algorithm is the following, I give 0x3fc4 or 0x1fc4 then transmitted again or the same or 0x00, and the answer is always to get the value of the next channel ADC.
Can you share scope shots of your digital activity? Are you using the AD7949 evaluation board? Which mode are you trying to use RDC/RAC/RSC with or without busy indicator?
Note that there is always a one deep delay when writing the CFG register. From power-up, in any read/write mode, the first three conversion results are undefined because a valid CFG does not take place until the 2ndEOC; thus two dummy conversions are required.
Retrieving data ...