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ADP5090 VIN Open Circuit Sampling Cycle = 2s

Question asked by L.Furrer on Dec 8, 2015
Latest reply on Dec 10, 2015 by L.Furrer

I'm using the Evalboard ADP5090-2-EVALZ, a few resistance and cap values exchanged (i can give the details if needed). The Output is loaded with 1Meg, 100uF. Cin is 100uF as well. MPPT and MINOP are used.

 

The Problem occurs when The input power is not sufficient and the system voltage Vsys slowly drops below 2.4V (approx.). The VIN Open Circuit Sampling Cycle then changes to a constant 2s intervall, where it should be 19s, as specified in the datasheet. This results in a bad harvesting performance, and Vsys dives down to coldstart.

 

Has anyone else encountered this Problem?

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