AnsweredAssumed Answered

AD9553 PLL lock problem

Question asked by .andy. on Nov 23, 2015
Latest reply on Dec 16, 2015 by .andy.

Hi,

 

I have an AD9553 on a custom board that receives 10MHz from a TCXO on REFA. REFB and XTAL are unused. I aim to produce 200MHz CMOS on +OUT1 to feed an FPGA with all other outputs unused. I cannot and have never got the PLL to lock and I'm wondering whether I'm missing something obvious. Here's more detail.

 

I don't have the EV board but I used the EV board software to design the loop filter. The results for the components were C1=0.237u, C2=3.83u, R=1.8k. I was able to cherry pick parts that were within 2% of those values. The caps are 0603 MLCC X7R and the resistor is 0805. The datasheet does not say whether the ability of the PLL to lock is affected by the accuracy of these components.

 

The block diagram and register map are attached. The device is configured for SPI programming. I have no problems writing registers and reading back to confirm that what I've written has been accepted. I simply program all registers in the register map sequentially, then commit in one go. Then I issue the manual calibration command (with its enable bit) and commit that.

 

I have tried mapping the test clocks to the LOCK pin. I can see that the reference clock is present and correct so the input dividers and MUX are working. Neither of the PFD or feedback clocks appear to be working. When they're configured to output on the LOCK pin it just stays low.

 

I've had the device under a microscope and the soldering appears fine although obviously I cannot see the EP but I'm reasonably sure it's connected OK. Are there any tell tales if it's not connected OK? The board is 4 layer with an unbroken ground directly below the top. There's an FPGA on the board, near to the AD9553, but I supply the TCXO and AD9553 from a dedicated LP5907 to try to keep noise under control. How much noise can the device tolerate on the supply line? I'm concerned that the current through the loop filter is very low and may be vulnerable to noise. My decoupling matches the recommendations in the datasheet.

 

I hope that's enough information. Any hints or tips would be greatly appreciated.

Attachments

Outcomes