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kc705 with AD-FMCDAQ2-EBZ

Question asked by iankim on Nov 19, 2015
Latest reply on Dec 22, 2016 by rejeesh
Branched to a new discussion

Hi

 

So, I have been struggling to build the reference design for FMCDAQ2-EBZ with KC705

 

https://wiki.analog.com/resources/eval/user-guides/ad-fmcdaq2-ebz/software/baremetal

 

The above link is my reference design.

 

I have reached to the end which says "copy the downloaded source files into src folder of the just created empty applicaiton"

 

Then, I run it on SDK after download bit file by clicking "program FPGA".

 

Next, I have clicked "open hardware" to open ILA debug core.

 

However, when I open it, it doesn't go further. it seems like stop and do nothing.

 

Can you tell me the steps after I run it?

 

Also, Can you tell me about the problem based on the result from the terminal (after "run")?

 

=======================================================

SPI Read Verify failed (0x0).

Error: Invalid CHIP ID (0x0).

JESD204B successfully initialized.

Error: Invalid CHIP ID (0x0).

JESD204B successfully initialized.

JESD204B GT RX 0 PLL is unlocked.

JESD204B GT TX 0 PLL is unlocked.

JESD204B GT successfully initialized.

JESD204B GT TX PLL is unlocked.

JESD204B GT TX CLK is enabled.

JESD204B GT RX PLL is unlocked.

JESD204B GT RX CLK is enabled.

Synchronization timeout. JESD204B_GT_REG_TX_STATUS = 0xF0F0

Synchronization timeout. JESD204B_GT_REG_RX_STATUS = 0xF0F0

DAC Core Status errors.

ADC Core Status errors.

Initialization done.

=============================================================

 

I appreciate any comment or help

Thank you

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