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Is the ADV7180 I2C really incompatible with Freescale MPC866 I2C

Question asked by Lionelwallace Employee on Nov 16, 2015
Latest reply on Nov 17, 2015 by DaveD

I received this question from a customer.  I've pasted in a lot of detail below; but what it boils down to is that it appears that the ADV7180 I2C is incompatible with the Freescale MPC866.  This seems almost inconceivable to me; but, this is what was concluded after input from the Freescale FAE and posts on Engineer Zone.

 

Please let me know if ADV7180 I2C is really incompatible with the MPC866 I2C or if there is a work around.  We need to know ASAP as the customer already has a proto board.  If the ADV7180 is really not compatible with the MPC866, they will have to re-spin immediately.

 

  • Customer input after initial look at Engineer Zone:

 

I think I see the problem. The ADV7180 can’t handle a stop/start after the sub-address write. That’s what our I2C bus driver is doing. Apparently, no other device we’ve used had a problem with that. I think we can fix it in software though…I hope. I’ll pass it on to Tony and see if he can change the controller settings.

 

  • Customer reply after examining the Freescale user's manual

 

I’m looking at the MPC866 User Manual Chapter 31 and I don’t see any way to keep its I2C controller from issuing a STOP after sending the slave address and sub-address. Am I missing something? Perhaps the Freescale support people have seen this before and have a solution? The ADV7180 wants START, slave address write, sub-address, START, slave address read, then it sends the read data. The MPC866 wants to send START, slave address write, sub-address, STOP, START, slave address read, and then wait for the data.

 

  • Additional explanation of the problem from the customer

 

I’ve attached a marked up version of the scope grab that explains the problem a bit more clearly…I think. Green is SDA and yellow is SCL. Tony has been trying all sorts of changes in the MPC866’s  I2C controller to no avail. Could we get someone at Freescale to tell us definitively whether it’s even possible for the I2C controller to not do that STOP after the sub-address? Perhaps there is some way to hold SCL low until SDA goes back high. That would work if it’s possible to do. We can’t figure out any way to do it. I’m starting to think I’m going to have to pick another decoder and re-spin the board again, if there is another decoder still available, or route the I2C signals through the FPGA and fix them up there.

 

  • Latest reply from Freescale FAE:

 

I don’t think there is a way to change this I2C behavior of the MPC866. From what I can tell, the 866 doesn’t have a concept of sending a “sub-address” to the slave. So I think what is happening is that the 866 sends a write command first with the slave’s address (7-bit) and then the data byte (which is the sub-address). I2C interface sees this as a completed write command, so sends a STOP. I don’t think this operation is configurable in the PQ1 (MPC866).

 

Not sure the best way to get around this issue, assuming the ADV7180 can’t be configured to work around it.



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