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AD9361 - Transmitting SISO on Tx2

Question asked by kfirkam on Nov 12, 2015
Latest reply on Dec 9, 2015 by tlili


I am trying to understand what modification is needed in order to transmit and receive with the second paths: Tx2/Rx2.

I have looked for the changes need to be done at the registers on “AD9361_Register_Map_v2.8C” and found 3 or 4 possible setting for this to be supported:

Register 002,xx

Register 003,xx

Register 004,03

xx= 5E for Tx/Rx1

xx= 9E for Tx/Rx2

xx= DE for Tx/Rx1&2


I have done the changes (9E) but it seems not to work.(No output signal was noticed)

When changing 002 and 003 to DE I got CW with low power at my TX1 and TX2 port


This made me realized that I might have missed something so I looked for a change of the IQ samples order….

SPI Register 0x010—Parallel Port Configuration 1
[D7] PP Tx Swap IQ Clearing this bit swaps the positions of I and Q (performs a spectral inversion).
[D6] PP Rx Swap IQ Same as bit D7 but for the Rx path.
[D5] Tx Channel Swap Setting this bit swaps the positions of Tx1 and Tx2 samples.
[D4] Rx Channel Swap Same as bit D5 but for the Rx pat


So I changed RegAdd 0x10 from 0xCC to 0xFC


Then it worked – (I can notice the correct mask and EVM on my test equipment from Tx2) but still noticed a low level CW(same frequency) on TX1

But now- my RX2 doesn’t seem to work…it reports a signal levels up to -35dBm only…


Some point outs:

I am facing those issues on my design and not the EBZ/FCOMM

on our design SISO mode on Tx/Rx1 is working

you can see the attached files for the register settings for Tx/Rx2 case.Pic1_SISO_TX2.bmpPic2_SISO_TX2.bmp


Can you please suggest/point out how I can achieve to transmit/receive on Tx/Rx2?