The user guide for the AD9361 suggests using the ADA4851 op-amp to buffer the 1.3Vpp reference clock at 40MHz when used for baseband synchronization purposes. Looking at the datasheet for that part, figure 26 suggests that it has a ~150V/us slew rate for a 1.3Vpp output step. If I understand this correctly, this means the output rise time will be at least 8.66ns of a 12.5ns half-period. I’d be curious what that waveform looks like, and if that’s really the right part to use. I only have 1.8, 2.5, and 3.3V power rails to work with, and bonus points are available for any suggested AEC-Q100 parts.