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Clock Generation Unit (CGU) and timers configuration.

Question asked by yvg on Nov 10, 2015
Latest reply on Nov 19, 2015 by Nabeel

Hi,

 

Does anyone know how can I configure the speed of the timers at maximum speed for the ADSP-CM408f?

 

I would like to configure the speed of the peripherals, for example: timers.

The timer is clocked by SCLK whose speed is determined by the following registers:

  1. CLKIN
  2. DF
  3. MSEL
  4. SSEL
  5. CSEL

 

(This information is from the ADSP-CM40x Hardware Reference, revision 0.2, section Clock Generation Unit, page 202)

In the SetupPLL() function, the expression below is used to compute the speed of the clock for system buses and peripherals.

picture_one.PNG

Then, what are the feasible values for those registers CLKIN, MSEL, SSEL, and CSEL? How do they determine the speed of peripherals (the expression of the speed of the peripheral as function of those registers)?

 

Find two examples of PLL setup of two different programs. My point is, given those values how can I predict the maximum speed of a given peripheral, as timer 7? In both examples timer 7 has the same configuration of maximum count, period etc…

picture_two.PNG

 

The example of the left is the pmsm_foc  code provided by ADI for the Ez-kit and the example of the right is also provided by ADI in the forum “Motor Control Hardware Platforms” under the name ADSP_CM40x Encoder example.

 

In addition I would like to know where/how I can find/measure the number of cycles that each function consumes (e.g. how many clock cycles does toggle function consume?)

 

Thanks in advance,

yvg.

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