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Sinc3 + decimation filter behavior

Question asked by EchoF on Nov 9, 2015
Latest reply on Nov 12, 2015 by EchoF

Hi all,


I would like to have some more details about the 800ksps -> 160ksps sinc3 filter - how is the decimation done? Is it an FIR filter? If so, what is the buffer length?


I am dealing with a very high speed application, where the measured signal changes rapidly. I am taking one sample in 160ksps, and the other is expected to have significantly different range.


That is why the transient effects of the filter are very important to me - I would like to ensure that the filter is not corrupting my data.


Thank you!



From the user guide, page 328:


ADC Decimation Filter The ADC sampling rate is 800 kHz, which is then decimated down by 5 to achieve the 160 kHz data rate for the DSP hardware accelerators. The decimation is done using a sinc3 filter, as shown in Figure 120. 

Figure 120. ADC Decimation Filter  The ADC decimation filter has notches at integer multiples of 160 kHz, except for 800 kHz. Filtering of interferes at integer multiples of 800 kHz is done by the analog antialiasing filter.