I am experiancing some issues with high harmonic spurs which seems to be sourced from my Data clock = 30.72MHz. (noticed on the Balune output stage at -80...-90dBm power level). Its harmonic falls directly on my Tx operation band and increased in my RF FE due to a PA.
I'm trying to debuge this issue and I would appriciate your assistance in that.
- I am using the built-in FIR filters from Matlab Application: "AD9361 Filter Design Wizard Version 2015_R1"
- In my design- Tx1A is sourced from LDO: ADP1755ACPZ
- On TX1A/1B I have RF Choks and also 3 bypass cap of 1uF/10nF/100pF
- A Balune 50/50 : B0322J5050AHF Anaren-Xinger family type.
- A WideBand LNA 50-4000 from RFMD
Can you please point out if there is any approach of reducing the Data Clock spurs which output from the Catalina device?