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FMCOMMS1 AD9548 clock derivation explanation

Question asked by cherif.chibane@ll.mit.edu on Nov 6, 2015
Latest reply on Nov 9, 2015 by charlyelkhoury

Hello,

 

I am trying to understand the AD9548 clocking of the FMCOMMS1. Where is the output of 122.88 is derived? Is it from the on-board 19.2 MHz or something coming from the FPGA.

 

I do not have a way using the IIO Space to access the AD9548 registers. Is there a way to access them so I can program my own?

 

Thanks,

Cherif

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