How is the level translation achieved with the ADG324x bus switches?
The signal applied to either the A or B pins of the ADG324x family of bus switches is clamped at the maximum pass voltage level specified in the datasheet. The maximum pass voltage is controlled by to parameters, the power supply voltage of the devices and the logic level applied to the /SEL pin, allowing the devices to perform the the following logic level translation operations:
Power Supply Voltage(V)
/SEL pin logic level
3.3V to 1.8V level translation
3.3V to 2.5V/
2.5V to 1.8V level translation
Please note that the bus switches from the ADG324x family can only perform step-down level translation (translates higher voltage logic levels into lower voltage logic levels). These devices cannot perform step-up level translation (i.e. 1.8V to 2.5V/3.3V or 2.5V to 3.3V).
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