I have an application where I need to convert the sample rate of a digital signal. The sample rate conversion is needed to analyze data (not for an audio application).
The sample rate ratio (fs_in/fs_out) is known and does not depend on any input or output clock. The SRC should convert a block of data (~16k samples), where the source and destination data are both stored in the DSP. I am thinking to configure one SPORT channel to transmit the samples from internal memory to the SRC and one SPORT channel to receive samples from the SRC.
Is it possible to misuse the ARC on the 21469 for such an application?
Is it possible to set the sample rate ratio (disable sample frequencies sensing)? Or can I use the PCG for the SPORT clock?