We have developed our application asm code on a 21369 which was working well and have now ported our design over to the 21469 rev 0.0,
We have 4 DSPs per board talking to a FPGA which links back to a 6Gbit back plane connecting to more boards. some setup may have a cluster of 44 DSPs.
We do a lot of FIR & IIR routines using custom code and unfortunately cant really reap the benifits of the hardware accelerator due to timing and filter size. Since porting over the code we have had a few small issues and a number of hardware anomaly 15000016 warnings.
Unfortunatly we use PM rather alot espically for single cycle FIR taps.
further more we do short memory to memory transfers with dm/pm single cycle transfers and DMA transfers
Unavoidible will be some time block conflict stall conditions. again adding to the problems refered to in 15000016
We are can not afford to loose efficentcy in any of our algrthyms adding a single nop to the cycle loops will effectivly kill our project proformance wise..
I have had a look at the following.
All and all looks like this is a major issue for us??
How is everyone else dealing with this issues?
When would we be seeing a fixed revision of the dsp?
Is there any where else we can turn to for help.