We are working on a 8 ADC system, based on the AD7177-2 ADC.
Can the AD7177-2 sample clock input be driven by LVPECL levels?
I would like to use the Hittite HMC987LP5E 1:9 Fanout Buffer as the clock distributor from a 16MHz clock generator.
Will this work?
Do the SPI clocks need to be synchronized with the sampling clock?