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how to configure the output of PTP_PPS on ADSP-BF518 chip

Question asked by charleshot on Oct 29, 2015
Latest reply on Nov 24, 2015 by VineethaThomas

Hi

 

I have a question about the IEEE 1588 PTP ENGINE within ADSP-BF518F16 chip when I configure the output of the PTP_PPS.I have program the EMAC_PTP_PPS_STARTHI,EMAC_PTP_PPS_STARTLO and EMAC_PTP_PPS_PERIOD according to the ADSP-BF51x Blackfin Processor Hardware Reference.But when I connect the PG[12] pin on bf518 chip to oscilloscope,I can not observe the signal.So I think it should be the configuration of the registers not proper.I want to know how configure the registers to enable the output of PPS.

Here is my program (SCLK=80MHz,PTP clock=50MHz):

 

    u32 reg_value;

 

    *pEMAC_PTP_PPS_PERIOD = 50000000; /* PTP_CLOCK 50MHz,so 50M cycles is 1s */

    *pEMAC_PTP_PPS_STARTLO = 50000000;

    *pEMAC_PTP_PPS_STARTHI = 0;

 

    reg_value = 0x0042;     /* Default value of PTP_CTL */

    reg_value |= 1<<7;      /* Enable PPS */

 

    reg_value &= ~(1<<8);      /* Enable EtherType mask */

    reg_value &= ~(1<<12);     /* Enable Control Field Mask */

    reg_value &= 1<<9;         /* enable IPVM */

    reg_value &= 1<<10;        /* enable IPTM */

    reg_value &= 1<<11;        /* enable UDPEM */

 

    reg_value |= 1<<13;     /* Enable Clkout */

    reg_value |= 1<<1;      /* Enable timestamp */

    reg_value |= 1<<0;      /* Enable the module */

 

    *pEMAC_PTP_CTL = reg_value;

 

    ssync();

 

Thanks sincere.

charles

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