There are 4 settings in AD9524 datasheet. What is right setting of antibaclash pulse? depend on my PFD frequency or "minimum"?
How to verify if I set wrong value?
The anti-backlash pulse is a feature in analog phase detectors to ensure that the charge pump current sources saturate every time they turn on. A setting of minimum achieves this goal and is sufficient for all operating conditions. The phase detector period determines the maximum value which can successfully be used in an active loop, but there is not much reason to deviate from a setting of minimum. A setting of minimum allows you to operate the PLL1 PFD frequency up to 130 MHz and a the PLL2 PFD frequency up to 259 MHz. This is listed in the specification table of the datasheet.
If a value that it too large is used, the PLL may not be able to achieve a locked state, which is a coarse indicator that you got the setting wrong. If a setting that is too small is used, the output clock's spectrum will show spurs at frequency offsets equal to sub harmonics of the phase detector frequency.
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