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HSC-ADC-EVALCZ+AD9653 could not run at 125MHz

Question asked by stinver on Oct 28, 2015
Latest reply on Oct 29, 2015 by DougI

Hi ,

we have HSC-ADC-EVALCZ+AD9653, it could sample a sine wave no problem when the sampling clock is below 100 Mhz or so,

above that it shows some spikes on the data. (We use VisualAnalog, the HSC-ADC-EVALCZ is FIFO501B ) ,

It looks like the FPGA firmware has timing issue at higher data rate.

Do you have a fix  to this problem?

We would need the ADC work at 125MHz !

 

Many thanks !

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