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ADuCM360 DAC interpolation mode fast/slow

Question asked by KevinPhe on Oct 23, 2015
Latest reply on Oct 28, 2015 by MikeL

Hello Everyone,

I'd like to use the DAC in high-resolution mode. I can't find much information regarding the following numbers:

DACCON_MDE_16BitSlow

DACCON_MDE_16BitFast

from aducm360.h

which are used in the DACCON register. Eg. via the following...

DacCfg(    DACCON_CLR_Off,

                DACCON_RNG_IntVref,

                DACCON_CLK_HCLK,

                DACCON_MDE_16BitSlow);

The UG-367 says this is bits 3:2 (MDE:RATE) of the DACCON register and it configures the interpolation clock as UCLK/32 or UCLK/16. But DACCON_MDE_16BitFast is 1000 DACCON[3:0], which means RATE is 0, which means UCLK/32. Wouldn't this be 'slow'? Or are these 'integration/settling' times?

Conversely, DACCON_MDE_16BitSlow is 1100 in DACCON[3:0], which means RATE is 1, which selects UCLK/16.

 

In any case, apart from being 'slow' and 'fast' what differece does this bit (RATE) make in practice? Does it effect resolution, or only my filtering at the DAC output?  Are there advantages to using one or th other?

 

Secondly, can the interpolation mode conflict with updating the DAC 'too fast' eg. on a timer interrupt (GP_Tmr0_Int_Handler) if the timer is getting called often?

GptLd(pADI_TM0,Tmr0Counter);//TmrCounter = 100    // Time-out period of x clock pules {0-65535}

GptCfg(pADI_TM0,

        TCON_CLK_UCLK,

        TCON_PRE_DIV256,

        TCON_MOD|

        TCON_RLD|

        TCON_ENABLE);

 

Many thanks. Great piece of kit!

K

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