We have incorporated the Vivado AD9361 IP (axi_ad9361 & axi_dmac from Non-OS example) into our design using an AMP design methodology. We are running bare metal on CPU1 and the latest Petalinux Linux version on CPU0. The AD9361 is used in a CPU1 bare metal configuration. It seems like the AD9361 IP wants to use the L2 cache for data collection, but the AMP design explicitly refrains from using L2 cache to prevent access to the SCU where L2 cache is controlled.
Does Analog Devices have an example of opening a communication channel between CPU1 and CPU0 to allow changes to the SCU in Linux I might incorporate into my SW design?