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ADV212 - Data latched on rising or falling edge of WE?

Question asked by jfmorris on Oct 16, 2015
Latest reply on Oct 16, 2015 by DaveD

I have a question based on behavior I am seeing on a board where I am using a 16 bit host interface to talk to the ADV212.  Basically, I am seeing an "off by one" issue when reading data BACK from the ADV212 memory space, compared to what I wrote.  For example, if I write this to 0x00050000 in the memory map, using the STAGE register value of 0x0005 and IADDR of 0x0000:

 

0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000a 000b 000c 000d 000e 000f

 

What I read BACK from 0x00050000 is changed to this:

 

0000 0002 0001 0004 0003 0006 0005 0008 0007 000a 0009 000c 000b 000e 000d 000f


I am wondering now if the ADV212 latches input data at the FALLING edge of WE, or at the RISING edge of WE.  I am not sure this would explain fully what I am seeing, but it might.  Right now I am trying to load firmware to the ADV212, and when I read it back to verify it, it starts with 0x0000, and then things are half word swapped, but off by a half word throughout the memory map, so that the wrong half words are swapped.  It doesn't explain that last 0x000f being in the right spot in the read back though.....


This is a critical question, as I am trying to finish and send out gerber files for a new revision of the board, but I need to make sure I don't need to change something else on the bus interface first.


Thanks!


Jim Morris

Huntsville, Alabama

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