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ADAR7251, PPI mode data_ready timing

Question asked by Davey on Oct 14, 2015
Latest reply on Oct 14, 2015 by Rajeev

In the ADAR7251 datasheet, Figure 46 and Figure 49 show data_ready goings high when data is available, and the data begins to be available on the DOUT pins.

 

 

Questions:

 

1.  Is SCLK_ADC always running?

2.  Does CONV_START\ need to stay low during the reading of the data, or can it return high at any time?

3. When does DATA_READY return low?  The figures show that data_ready stays high, and the channel data repeats continuously on the DOUT pins?

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