
I have this circuit to be simulated in Pspice. I'm a complete newbie to it. But so far have managed to make the schematic (adding external components, which were not available already in the library). I have added models for AD8336, AD736 and AD8551 externally (models for which were available on Analaog devices website). Now when I try to run my simulation, I get errors as to the sub circuits used by AD8336 and AD736 are undefined (although I have added the libraries for both the AD8336 and AD8551 to my design in the simulation profile). Kindly help. I really feel stuck up at this point. I got to make this work anyhow. 
Error Log:**** 10/07/15 10:45:53 ****** PSpice Lite (October 2012) ****** ID# 10813 ****
** Profile: "SCHEMATIC1AGC Analysis" [ C:\OrCAD\OrCAD_16.6_Lite\tools\capture\agc_simpspicefiles\schematic1\agc analysis.sim ]
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "AGC Analysis.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
.LIB "C:/OrCAD/OrCAD_16.6_Lite/tools/pspice/library/ad736.lib"
.LIB "C:/OrCAD/OrCAD_16.6_Lite/tools/pspice/library/ad8551.lib"
.LIB "C:/OrCAD/OrCAD_16.6_Lite/tools/pspice/library/ad8336.lib"
* From [PSPICE NETLIST] section of C:\Users\Sakshi_Project_staff\AppData\Roaming\SPB_16.6\cdssetup\OrCAD_PSpice/16.6.0/PSpice.ini fi
.lib "nomd.lib"
*Analysis directives:
.TRAN 0 10ms 0
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
**** INCLUDING SCHEMATIC1.net ****
* source AGC_SIM
V_V5 N13626 GND 5Vdc
X_U1 N13234 N13194 N13510 GND N13478 GND GND N13478 N13910 N133221
+ N13784 AD8336
R_R4 GND N13194 1k TC=0,0
C_C9 GND N13330 4.7n TC=0,0
R_R6 N13258 N13290 10k TC=0,0
X_U2 GND N13590 N15826 N13578 GND N13626 N13290 N13310 AD736
V_V3 N13784 GND 5Vdc
V_V1 GND N13030 5Vdc
R_R7 N133221 N13330 100 TC=0,0
C_C3 GND N13082 0.1u TC=0,0
C_C5 N13234 N13258 0.022u TC=0,0
V_V6 GND N13578 5Vdc
R_R5 N13230 N13258 10k TC=0,0
C_C11 N13510 N13478 1n TC=0,0
C_C1 GND N13030 0.1u TC=0,0
R_R10 N13510 N13478 1k TC=0,0
C_C6 N13578 N13310 33u TC=0,0
V_V4 GND N13672 5Vdc
R_R1 N13118 N13082 9.09k TC=0,0
R_R9 N13768 N13510 1k TC=0,0
X_U3 N13672 N13234 GND N13258 N13648 AD8551
R_R3 N13194 N13082 1k TC=0,0
C_C4 N13230 N13234 2.2u TC=0,0
R_R11 GND N13590 1Meg TC=0,0
C_C7 N13330 OUTPUT 10u TC=0,0
C_C10 N13590 OUTPUT 0.1u TC=0,0
R_R13 N13118 N13648 500 TC=0,0
V_V2 N13910 GND 5Vdc
R_R12 GND N13648 500 TC=0,0
C_C12 N15826 N13290 10u TC=0,0
V_V9 N13768 GND AC 5V
+SIN 0V 5V 50 0 0 0
**** RESUMING "AGC Analysis.cir" ****
.END
**** EXPANSION OF SUBCIRCUIT X_U1 ****
X_U1.E_U4_E8 X_U1.VPBUF 0 TABLE { V(10#, 0) } 0 0 2.8 0 3.0 1.6 5 3.6
+ 12 10.6 15 13.6 uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
+ E_U4_E9 VNBUF 0 TABLE { V(8#, 0) } 15 13.6 12 10.6 5 3.6 3.0
+ 1.6 2.8 0 0 0 uselim
X_U1.X_U4_D5 N13478 X_U1.VPBUF DC_1mV_1A_1V_1nA
X_U1.C_U4_C3 0 X_U1.U4_S3 1n
X_U1.R_U4_R4 0 GND 450K
X_U1.C_U4_C5 0 X_U1.U4_N24227 2.5p
X_U1.E_U4_E7 X_U1.U4_N254725 0 VALUE {V(U4_N349891,0)*V(POK,0)}
X_U1.R_U4_R6 0 N13510 450k
X_U1.X_U4_D15 X_U1.VNBUF X_U1.U4_S3 GEN_DIODE
X_U1.C_U4_C1 N13510 N13478 2p
X_U1.X_U4_D13 X_U1.U4_S3 X_U1.VPBUF GEN_DIODE
X_U1.G_U4_G4 0 X_U1.U4_N24227 X_U1.U4_S3 0 1
X_U1.C_U4_C4 N13510 0 6p
X_U1.X_U4_D6 X_U1.VNBUF N13478 DC_1mV_1A_1V_1nA
X_U1.X_U4_S1 X_U1.PWRAL 0 X_U1.U4_N254725 X_U1.U4_S3 PrA_U4_S1
X_U1.E_U4_E6 X_U1.U4_N349891 0 GND N13510 1.0
X_U1.C_U4_C2 GND 0 6p
X_U1.G_U4_G3 X_U1.U4_N24227 N13478 TABLE { V(U4_N24227, 4#) } 15
+ 60m 1m 50m 0 0 1m 50m 15 60m uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
+ G_U2_G8 8 0 PWRAL 0 11m
X_U1.X_U2_U12 PARAMS X_U2_U12.TH 2.8 N13910 X_U1.U2_N958367
+ COMPARATOR2
X_U1.R_U2_R14 0 N13910 50K
X_U1.R_U2_R11 0 N13784 50K
X_U1.G_U2_G6 N13910 0 X_U1.POK 0 14m
X_U1.X_U2_U16 X_U1.U2_N968984 X_U1.POK X_U1.PWRAL AND
X_U1.X_U2_U14 X_U1.U2_N958933 X_U1.U2_N958855 X_U1.POK AND
X_U1.R_U2_R13 0 N13910 50K
X_U1.V_U2_V1 X_U1.U2_AGAINDB1 X_U1.U2_AGAINDB2 12.04
X_U1.G_U2_G3 0 X_U1.U2_AGAINDB1 TABLE { V(VGN, 6#) } 1.0 14.0 0.7
+ 14.0 0.6 12.5 0.52 9.3 0.0 17.0 0.2 27.0 0.4 37.0 0.5 42.0 0.6
+ 46.0 1.0 46.0 uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
+ X_U2_D13 1 10 GEN_DIODE
X_U1.R_U2_R8 0 X_U1.U2_AGAINDB1 1
X_U1.E_U2_E1 X_U1.VGN 0 N13194 N13234 1
X_U1.X_U2_U15 X_U1.U2_N967091 GND X_U1.U2_N968984 COMPARATOR
X_U1.G_U2_G7 N13784 0 X_U1.PWRAL 0 11m
X_U1.X_U2_U13 X_U1.U2_N958367 X_U1.U2_N958855 INVERTER
X_U1.E_U2_ABM1 X_U1.AGAIN 0 VALUE { (10**(V(U2_AGAINDB2)/20))*V(POK)
+ }
X_U1.R_U2_R12 0 N13784 50K
X_U1.C_U2_C5 0 X_U1.U2_AGAINDB1 20n
X_U1.X_U2_U11 PARAMS X_U2_U11.TH 2.8 N13784 X_U1.U2_N958933
+ COMPARATOR2
X_U1.G_U2_G5 N13784 0 X_U1.POK 0 14m
X_U1.X_U2_D14 N13910 N13234 GEN_DIODE
X_U1.E_U2_E2 X_U1.U2_N967091 0 TABLE { V(10#, 0) } 0 0 3 0.7 5 1.2 12
+ 3.2 uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
+ X_U2_D16 0 10 GEN_DIODE
X_U1.X_U2_D15 N13910 N13194 GEN_DIODE
X_U1.E_U3_E8 X_U1.U3_CMOUT X_U1.U3_N55982 GND 0 1
X_U1.E_U3_ABM1 X_U1.U3_N62113 0 VALUE { MIN(PWR(V(AGAIN),1),1.6) }
X_U1.E_U3_E7 X_U1.U3_N55982 0 TABLE { V(VGN, 0) } 0.7 2m 0.6 4m
+ 0.5 8m 0.45 10m 0.4 14m 0.35 15m 0.3 11m 0.25 9m 0.2
+ 11m 0.1 22m 0.0 25m 0.1 16m 0.2 19m 0.3 32m 0.4 52m 0.5
+ 80m 0.6 120m 0.65 128m 0.7 127m uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
+ E_U3_ABM2 U3_N61993 0 VALUE { (V(U3_RIN)V(U3_ROUT))/nonzero(V(U3_N62113))
+ }
X_U1.G_U3_G3 X_U1.U3_N48981 X_U1.U3_N48971 TABLE { V(U3_N48981, U3_N48971)
+ } 15 75m 1m 64.8m 0 0 1m 64.8m 15 75m uselim
$
ERROR(ORPSIM16152): Invalid number
$
ERROR(ORPSIM16049): Values must be monotonic increasing
ERROR(ORPSIM15108): Subcircuit DC_1mV_1A_1V_1nA used by X_U1.X_U4_D5 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U4_D15 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U4_D13 is undefined
ERROR(ORPSIM15108): Subcircuit DC_1mV_1A_1V_1nA used by X_U1.X_U4_D6 is undefined
ERROR(ORPSIM15108): Subcircuit PrA_U4_S1 used by X_U1.X_U4_S1 is undefined
ERROR(ORPSIM15108): Subcircuit COMPARATOR2 used by X_U1.X_U2_U12 is undefined
ERROR(ORPSIM15108): Subcircuit AND used by X_U1.X_U2_U16 is undefined
ERROR(ORPSIM15108): Subcircuit AND used by X_U1.X_U2_U14 is undefined
ERROR(ORPSIM15108): Subcircuit COMPARATOR used by X_U1.X_U2_U15 is undefined
ERROR(ORPSIM15108): Subcircuit INVERTER used by X_U1.X_U2_U13 is undefined
ERROR(ORPSIM15108): Subcircuit COMPARATOR2 used by X_U1.X_U2_U11 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U2_D14 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U2_D15 is undefined
ERROR(ORPSIM15108): Subcircuit DC_1mV_1A_1V_1nA used by X_U1.X_U3_D7 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U3_D18 is undefined
ERROR(ORPSIM15108): Subcircuit DC_1mV_1A_1V_1nA used by X_U1.X_U3_D6 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U3_D17 is undefined
ERROR(ORPSIM15108): Subcircuit VGA_U3_S1 used by X_U1.X_U3_S1 is undefined
ERROR(ORPSIM15108): Subcircuit GEN_DIODE used by X_U1.X_U3_D15 is undefined
ERROR(ORPSIM15108): Subcircuit AEIOPAMP0 used by X_U2.X3 is undefined
ERROR(ORPSIM15108): Subcircuit AEIOPAMP1 used by X_U2.X1 is undefined
Hello Sakshi,
I'm looking into it. but have you tried running it in other simulation platform? ADISimPE?
Thanks,
Phil