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IP Core Address Ranges

Question asked by digi_designer on Oct 13, 2015
Latest reply on Oct 14, 2015 by rejeesh

What are the minimum address ranges for the dac_dma, adc_dma, ad931, and timer IP Cores? The dac and adc dma address ranges determine how much data can be read at a given time, but then the data needs to be stored in memory? This storage is done in DDR memory in the reference designs.

 

I only have the FPGA's BRAM available to use as storage and I want to use as much of that as possible to store data received from the adc and data I transmit to the dac.

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