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Data readout trouble of AD7175-2

Question asked by ricky on Oct 12, 2015
Latest reply on Jun 29, 2016 by jcolao

Hi All,

 

One of my customer has trouble with AD7175-2BRUZ A/D Converter in his prototype board. He built 4 prototype board and this trouble occur on all 4 boards.

When the power is turned on, it working okay.

After a few hours later, his MCU doesn’t readout from AD7175-2BRUZ.

At this stops, the AD7175-2BRUZ status register is “0x80”.

Sometimes it resumes automatically, at this time the status register became “0x00”.

Are there any concern in his configuration mentioned below?

 

1.  Setting up procedure for AD7175-2BRUZ
      1) Send 64 clocks on SCLK at Reset DIN “Hi”

2) Write IFMODE: 0x0200440D (DATA_STAT enable, CRC_EN XOR checksum)

3) Write CH0: 0x100001A5 (CH0 disable)

4) Write CH1: 0x110001CE (CH1 disable)

5) Write CH2: 0x12000173 (Ch2 disable)

6) Write CH3: 0x13000118 (Ch3 disable)

7) Write SETUPCON0: 0x2003007C (Unipolar, AIN+/- Input buffer enable, ext. reference)

8) Write FILTCON0: 0x28051124 (20SPS)

9) Read STATUS: 0x40 (read status register and clear)

10) One of the following write operation: CH0: 0x10801676, CH0: 0x10803696, CH0: 0x108056B1, CH0: 0x10807651, CH0: 0x108096FF

11) Wait for 5msec (Waite for settling of analog switch)

12) Write ADCMODE: 0x0100101B (Single conversion mode, internal osc)

13) Wait for 55ms (A/D conversion time is 50msec)

14) Read 0x44 (Read data register and status register)

 

Step 1 through 8 is for initialize of ADC.

Repeat 9 through 14 to gather ADC data.

 

2. Circuit schematic is attached.
Component values are as next; R186-R190: 0Ω, C135-C139: 100pF/50V, R136: 47Ω/0.1W, R137: open, X2: 16MHz, C103: 0.1uF/50V, C104: 1.0uF/16V, C110: 15uF/10V, C111: 0.1uF/50V, C119: 0.1uF/50V, C120: 4.7uF/25V, C121: 0.1uF/50V, C123: 15uF/10V, C124: 0.1uF/50V, C130: 15uF/10V, C132: 0.1uF/50V, C133: 0.1uF/50V, C134: 1.0uF/16V

 

3. SPI speed is 500kHz

 

Could you send us any advice in order to allocate my customer’s problem?

 

Best Regards.

  Ricky

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