I am trying to simulate a simple circuit using the AD8131 official SPICE model in PSPICE. However I find difficulties in obtaining the expected results, in fact the same circuit works correctly as expected in real world with the output voltages offset at midsupply (2.5V) and symmetrical waveforms but the PSPICE simulation somehow has strange output voltage offset (3.8V) and non-symmetric waveforms. I am using VOCM to set the offset at 2.5V using a resistor divider with resistor in such range that should not affect the voltage through bias current. I am attaching the full PSPICE .CIR file with documented sections and AD8131 .SUBCKT downloaded from ADI.
The whole my purpose was simulating circuit stability against output capacitance but when I saw strange results I decided to run a simple sine wave transient analysis and then I was surprised by the output waveforms. Is it possible that the VOCM is not correctly modeled or maybe I made a mistake in at circuit or netlist level.