I have a question about JESD204B interfaced ADCs.
ADCs which has JESD204B requires very precise and low noise powers.
For example, AD9680 (14bit 500MSPS to 1GSPS dual ADC) has 7 kind of different power.
AVDD1 1.22 / 1.25 / 1.28 (min/typ/max) [V]
AVDD2 2.44 / 2.50 / 2.56
AVDD3 3.2 / 3.3 / 3.4
AVDD1_SR 1.22 / 1.25 / 1.28
DVDD 1.22 / 1.25 / 1.28
DRVDD 1.22 / 1.25 / 1.28
SPIVDD 1.7 / 1.8 / 3.4
But I feel like LVDS I/F ADCs don't have such a strict rule.
I want to take an example of AD9643 (14bit 170MSPS to 250MSPS dual ADC).
AVDD 1.7 / 1.8 / 1.9
DRVDD 1.7 / 1.8 / 1.9
I imagine power supply for digital should be accurate, otherwise sometimes the link with a digital component is possible to break down.
But I still wonder why power supply for analog also have a narrow range...
This is my question.
1. Is it correct that digital power supply has strict rule because of keeping JESD204B connection with a digital component?
2. Why is analog supply for JESD204B ADC also required such a narrow acceptable voltage range? What is happened if it is wobbling within spec? Does that affects to linearity or other specs of ADC?
Could you give me your advice?