Hi, we have captured chip RSSI field (6bit) within SSI frame along with 24 bit I&Q at 84KHz sample rate for the AD9874 at various IF frequency of 45MHz at various power levels. After considering front end RF chain, the IF input fed to the chip is 45MHz at various IF power levels from -75dBm to 10dBm.
AD9874 settings: 16dB LNA/Mixer attenuation : disabled, VGA set for 12dB attenuation, chip AGC is disabled.
24bit I and Q used.
The 6-bit RSSI field read as 0 for IF input of -75dBm to -36dBm; it is 1 for -35dBm power, it is increased to 10 for IF power level -10dBm. Further increasing the IF power, RSSI is saturates. The 8-bit attenuation field shows as 7F h (127d).
As per datasheet, the RSSI field with 60 corresponding to a full-scale signal for a given AGC attenuation setting.
But we got max value is 10. Please let us know what would be the reason? is it 12dB AGCG setting?
Is the RSSI varies in dB corresponding to IF input power level?
Also observed that the I data (24bit) is overriding with noise 42KHz (1/2 of sampling rate 84KHz). Please let us know what would be the reason?
|IF Input level (dBm)||RSSI Value|