We have used the HMC284MS8G for several years for a number of broadband applications (0.1 MHz to 1 GHz). The switches are driven by 74AHC04 gates, and simple DC blocks are used on the 50-ohm inputs and outputs (typically 0.1 uF). Recently we noted that during high-level (transmit) pulse trains (e.g. 2-4 Vpp, 1ms on, 5 ms off) the DC bias at RF1/RF2/RFC becomes upset, sometimes rising by 1-2V. Subsequently, there is significant attenuation of the weak signal (receive, between pulses), which only recovers after the bias returns to normal in 100 microseconds or more. During these upsets, there is no distortion or change in level of the driving pulses.
I guessed that perhaps some rectification of the RF was occurring, and added 10k resistors to ground at each RF pin, hoping to provide a DC return path for the rectified signal. This reduced the bias level from ~5V to ~3V, but completely eliminated the bias upset (good). The insertion loss did not change noticeably. Unfortunately, the modified circuit now shows a very significant and undesirable switching transient of 1-2V for 10 microseconds or more, even with no applied RF signal (bad).
The data sheet and eval PCB schematic don't show any requirement for special attention to biasing. Do you have any recommendations for circuit modifications to avoid these unwanted effects?