I am working with the latest FMCOMMS2 HDL design linked from the AD website targeted for the Zed Board (Zynq) and Vivado 2014.4.1. My intention is to add some IP and create a new boot SD Card, but I am having issues even creating an SD card with the unmodified design. For the SD Card, I need device tree files (*.dts, *dtsi), but when run through the steps shared on the Xilinx website Blob, I get an error on the last (?) step.
I capture the design (for 2014.4.1), build the libraries, and use Vivado/SDK 2014.4.1 to implement the block design and bitstream and export the hardware. SDK comes up OK and I add a repository "device-tree-xlnx" I cloned from github.com. The next step is create a new Board Support Package using this device tree OS (which is supposed to generate the *.dt* files), but the BSP generation fails apparently due to a hierarchy command.
09:05:37 ERROR : [Common 17-170] Unknown option '-hier', please type 'get_cells -help' for usage info.
[Hsi 55-1545] Problem running tcl command ::sw_cpu_cortexa9::generate : ERROR: [Common 17-170] Unknown option '-hier', please type 'get_cells -help' for usage info.
I can't tell if this is a Xilinx issue or an AD FMCOMMS2 issue. Anyone have any ideas creating a boot SD card?