What is the role of DP_DISABLE parameter. My understanding is that when DP_DISABLED is '1', the DDS and DMA data are not taken into account (for DAC_input, in case of DP_DISABLE in DAC module) and only the interfacing core to the DAC/ADC is considered.
If my understanding is correct, then if I just set this variable as 1 in the reference HDL Design, I should not see a sine wave at 2.5 Ghz( 16'b0 is being read by the dac inputs in case DP_DISABLE is high) on the IIO Oscilloscope. Correct?
Also, in such a case, what should the DDS mode be set to? Disable?
Would be really helpful if somebody could help me with this.