AnsweredAssumed Answered

A10 build for FMDAQ1

Question asked by komo Employee on Sep 28, 2015
Latest reply on Oct 5, 2015 by rejeesh

So, I’m following the directions to build the FMDAQ2 shown
here https://wiki.analog.com/resources/fpga/docs/hdl

 

 

I’m trying to build it against the A10 board, using
quartus15, and I am getting an error.

 

 

 

 

 

Error (12252): System_bd.util_cpack_0:
util_cpack_0.adc_reset must be connected to a reset source

 

 

Error (12153): Can't elaborate top-level user hierarchy

 

 

Error: Quartus II 64-Bit Analysis & Synthesis was
unsuccessful. 2 errors, 87 warnings

 

 

             
Error: Peak virtual memory: 941 megabytes

 

 

             
Error: Processing ended: Mon Sep 28 12:29:31 2015

 

 

             
Error: Elapsed time: 00:01:54

 

 

             
Error: Total CPU time (on all processors): 00:02:42

 

 

Error (293001): Quartus II Full Compilation was
unsuccessful. 4 errors, 87 warnings

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