We are using a number of the ADM2857E devices in a new design. The bus is running at 250kbps meaning the bit time is 4uS.
The logic side data enable signal is constructed using a standalone LTC timing device that is fixed to the baud rate. In essence this worked well until we realised that we had overlooked the difference in the propagation delays. The 'enable' propagation delay is specified at a maximum of 2500nS whilst the 'signal' propagation is a minimum of 250nS. At the start of a byte both the data enable line and signal line are driven at the same time by our timing hardware and thus theoretically in a worst case scenario the start bit may only be transmitted for 4000-(2500-250) = 1750nS. This would obviously cause timing errors and data loss. Initial testing with some prototype boards show that the typical enable propagation delay is much less than 2500nS and is more in the order of 500nS.
We can fix this problem for good by enabling the transmitter at least 2uS before data is sent and stretching the total enable time by the same amount. However before we spin the board we would like to do more testing on other elements of the system and would like to know the factors that effect the enable propagation delay and if you have any typical values.
Can you please advise the following for the enable propagation delay:
- Typical delay
- If the delay is process/batch dependent
- If the delay is temperature dependent
- If the delay is baud rate dependent (although I can't imagine why it should be..)