I need to type of HMC832 REF-CLOCK input type below 50 MHz? In the datasheet, It was written as it must be square wave. But which standards are supported? And also are there any s-parameters or measured data?
It's a question of performance. A sinusoidal clock <50MHz will work but the reduced slew rate cause degraded performance. We include the following table on page 23 of the datasheet.
If you use a square wave reference, pick a part with slew rate > 0.5V/ns with drive levels as stated in the table. Some S-parameter data may have been measured during verification but I will need to find this data.
Thanks for your answer. It is really helpful.
Actually, I want to understand following. Our design will provide LVPECL or LVDS clock reference for HMC832. Are these signals suitable for HMC832? And They are differential signals, but HMC832's reference input is single-ended. Do you have suggestion to conversion method for differential to single-ended ? With a converter or with a balun etc. Which type suitable for LVPECL or LVDS clock reference to conversion?
Do you have specific clock drivers in mind? The LVDS/LVPECL specifications state output levels but the driver datasheets may state something different.
Typical 0.35 Vpp LVDS levels are a too low for the HMC832 reference input. LVPECL levels are higher but they can still vary from the minimum required at 0.6 V to 1 V. In any case you will need to convert the differential output to single ended. Depending on the driver ac terminating one output to ground may work, or you could use a balun. The HMC832 reference input has an internal bias which requires ac coupling.
we will use AD9523-1 for clock distribution. But I could not achieve HMC832's real performance even satisfy datasheet input clock suggestions. We use HMC832 eval board external clock input while testing. I tried all outputs several different ways and apply 50 MHz clock. HMC832 is locked but phase noise performance is awful. How could we achieve real phase noise performans applying AD9523-1 output to HMC832's clock input?
Check the HMC833 eval board has been configured for external reference:
Can you measure the 50MHz signal at R18 on the HMC833 eval board. From the above Table 8 this signal must be 0.6Vpp to 2.5Vpp with slew rate > 0.5V/ns.
We have already done that you mentioned. But my question about HMC832 performance problem. we applied a signal which is 0.6Vpp to 2.5Vpp with slew rate > 0.5V/ns. But there is a spur about 36 kHz away center. We tried several ways to eliminate this spur. We think that it is clock drive strength problem. Any output of Ad9523-1 is not enough to drive HMC832's clock input. What is required drive strength to achieve HMC832 real performance? How could we drive HMC832 with AD9523-1?
Can you replace the 50MHz reference from the AD9523-1 with a bench signal generator. If the reference meets the input requirements for the HMC832 why do you think the drive is too low? Check if the spur goes away when the HMC832 is configured in integer mode. Does the spur move as you change output frequency?
I applied square wave to HMC832's reference input with using arbitrary waveform generator and the results is better than when we use AD9523-1 clock source but not good as eval board configuration performance.Even If we change frequency or using fractional or integer mode, The spur is still at same spot.
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