Our customer is verifying with your AD5700-1.
So I got the following questions.
Your datasheet show that there is the RXD Low around 600msec after CD asset on Fig-5.
Why is RXD drop Low 600msec? Reason why?
What is the min-max time RXD Low?(600msec +/-??msec)
Is there the case of still High RXD(not drop to Low)?
Fig-22 on your datasheet also show RXD drop to LOW when the start and the stop during 8bit data+parity.
Is this UART rule?
Min-Max value also?
Here is additional comment from our customer.
In the case of Low level time around 600usec on your datasheet Fig-5, AD5700-1 cannot recognize that it is START bit due to less than 833usec+/-1% HART standard.
Custmer think the reason why is that the head is START-bit.
Because RXD signal is effective after assert CD signal, START-bit become short Low time.
Even though HART signal timing is same, Low level time varies much.
Customer caught no-Low-level(still High level).