I have a customer with the following question:
- (1) I am using the SOIC package, which has two –Vs pins. Is it best connect both 4 and 5, or just pin 5 (see figure and data sheet excerpt below)?
- (2) Input bias currents can be reduced from -6uA to -0.1uA by tying the ~DISABLE pin to the +5V rail (at the expense of increased wide band noise). My question is does this have any positive or negative affect on the Input Offset current Ios vs temperature specification?, which is specified at 3nA/C (typical)?
“ ... The SOIC is slightly different with the intent of both isolating the inputs
from the supply pins and giving the user the option of using the
ADA4899-1 in a standard SOIC board layout with little or no
- modification. Taking the unused Pin 5 and making it a second
negative supply pin allows for both an input isolated layout and
a traditional layout to be supported.”