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ad9680-1000 configuration problem, real inputs, complex output, decimation by2

Question asked by valsh on Sep 11, 2015
Latest reply on Oct 1, 2015 by valsh

Hi!

I want to use AD9680 in mode with 2 independent real input channels, 2 DDC (NCO freq. is 250MHz), decimation by 2 (use only HB1 FIR) and complex output.

 

My register's config sequence is:

 

0x0000, 0x81  // soft reset

 

0x0001, 0x00

0x0002, 0x00

 

0x0015, 0x00

0x0016, 0x0E

0x0934, 0x1F

 

0x0018, 0x40

0x0019, 0x50

0x001A, 0x09

0x011A, 0x00

0x0935, 0x04

0x0025, 0x0A  // full scale adjust

0x0030, 0x18  // see tab 10 of DS

0x0016, 0x0E

0x0934, 0x1F

 

0x0024, 0x00

0x0028, 0x00

 

0x003F, 0x80

0x0040, 0x80

0x010B, 0x00

0x010C, 0x00

0x010D, 0x00

0x0117, 0x00

0x0118, 0x00

0x0120, 0x40

0x0121, 0x00

0x0123, 0x00

0x01FF, 0x00

 

0x0200, 0x02  // I and Q,  DDC0 and DDC1 on

0x0201, 0x01  // decimation by 2

 

0x0228, 0x00

0x0245, 0x00

0x0247, 0x00

0x0248, 0x00

0x0249, 0x00

0x024A, 0x00

0x024B, 0x00

0x024C, 0x00

0x026F, 0x00

0x0270, 0x00

0x0271, 0x80

0x0272, 0x00

0x0273, 0x00

0x0274, 0x01

0x0279, 0x03

0x027A, 0x02

 

0x0300, 0x00

 

0x0310, 0x03 // IF = Fadc/4; decimation by 2

0x0311, 0x00 // input channel 0

0x0314, 0x00 // NCO low

0x0315, 0x04 // NCO high

0x0320, 0x00

0x0321, 0x00

0x0327, 0x00

 

0x0330, 0x03 // IF = Fadc/4; decimation by 2

0x0331, 0x05 // input channel 1

0x0334, 0x00 // NCO low

0x0335, 0x04 // NCO high

0x0340, 0x00

0x0341, 0x00

0x0347, 0x00

 

0x0550, 0x00   // test

0x0551, 0x00

0x0552, 0x00

0x0553, 0x00

0x0554, 0x00

0x0555, 0x00

0x0556, 0x00

0x0557, 0x00

0x0558, 0x00

0x0559, 0x00

0x055A, 0x01

0x0561, 0x01

0x0562, 0xF0

0x0564, 0x00

0x056E, 0x00

 

0x0570, 0x91

0x0571, 0x14

0x0572, 0x00

0x0573, 0x40

0x0574, 0x00

0x0578, 0x00

0x0580, 0x00

0x0581, 0x00

0x0583, 0x00

0x0584, 0x01

0x0585, 0x02

0x0586, 0x03

0x058B, 0x00 // scr disable

0x058D, 0x1F

0x058F, 0x0F

0x0590, 0x0F

0x05B0, 0xAA // use all lines

0x05B2, 0x00

0x05B3, 0x11

0x05B5, 0x22

0x05B6, 0x33

0x05BF, 0x05

0x05C1, 0x00

0x05C2, 0x00

0x05C3, 0x00

0x05C4, 0x00

0x05C5, 0x00

But it doesn't work. I see my test signal (suppose it real channel) in one lane. But in second lane I see constant value. In the picture there are 32-bit output ports of 0 and 1 lines.

adc1.png

there is right data in "adc_core__odat".

In alnalog view it looks:

adc2.png

I have only one quadrature channel.

Can anyone show where I make a mistake? In fullband mode device works ok.

Outcomes