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Is there a simple driver example taking advantage of the AXI DMAC?

Question asked by EdwardK on Sep 9, 2015
Latest reply on Oct 9, 2015 by larsc

Hi,

 

I have a few custom peripherals in PL for which such a generic driver would be handy and help solve a barrier to entry that I keep running into repeatedly. Basically, I have a custom communication bus and have HDL handling the PHY access. What I am missing is how to get data to and fro Linux user space easily.

 

a) The following setup is what I envision.

 

1) # iio bus

set axi_iio_tx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_iio_tx_dma]

set_property -dict [list CONFIG.C_DMA_TYPE_SRC {0}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_DMA_TYPE_DEST {1}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_FIFO_SIZE {16}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_AXI_SLICE_DEST {1}] $axi_iio_tx_dma

set_property -dict [list CONFIG.C_AXI_SLICE_SRC {1}]  $axi_iio_tx_dma

set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_iio_tx_dma

 

set axi_iio_rx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_iio_rx_dma]

set_property -dict [list CONFIG.C_DMA_TYPE_SRC {1}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_FIFO_SIZE {16}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_2D_TRANSFER {0}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_CYCLIC {0}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_AXI_SLICE_DEST {1}] $axi_iio_rx_dma

set_property -dict [list CONFIG.C_AXI_SLICE_SRC {1}]  $axi_iio_rx_dma

set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_iio_rx_dma

 

ad_mem_hp1_interconnect sys_200m_clk sys_ps7/S_AXI_HP1

ad_mem_hp1_interconnect sys_200m_clk axi_iio_tx_dma/m_src_axi

ad_mem_hp1_interconnect sys_200m_clk axi_iio_rx_dma/m_dest_axi

 

2) Initial test connect axi_iio_tx_dma/m_axis to axi_iio_rx_dma/s_axis for the loopback.

 

3) Then connect axi_iio_tx_dma/m_axis to custom_dev/s_axis and axi_iio_rx_dma/s_axis to custom_dev/m_axis.

 

4) DTSI entries

dma: dma@7c820000 {

  compatible = "adi,axi-dmac-1.00.a";

  reg = <0x7c420000 0x10000>;

  interrupts = <0 57 0>;

  clocks = <&clkc 16>;

  #dma-cells = <1>;

 

  dma-channel {

  reg = <0>;

  adi,source-bus-width = <64>;

  adi,source-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>;

  adi,destination-bus-width = <64>;

  adi,destination-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>;

  };

};

 

dma: dma@7c920000 {

  compatible = "adi,axi-dmac-1.00.a";

  reg = <0x7c420000 0x10000>;

  interrupts = <0 57 0>;

  clocks = <&clkc 16>;

  #dma-cells = <1>;

 

 

  dma-channel {

  reg = <0>;

  adi,source-bus-width = <64>;

  adi,source-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>;

  adi,destination-bus-width = <64>;

  adi,destination-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>;

  };

};

 

b) What I need is a simple client driver that uses dma-axi-dmac to create a simple IIO rw device that allows checking if there is data via sysfs along with buffer enable & length. I imagine full duplex should not be an issue.

 

c) This is is all from me looking at what is there but not having much experience with kernel programming. I am I making this way more difficult that it should be? I really would like to avoid using mmap from user land as most folks do and I believe this small piece would be handy to the community as a whole. Maybe in the future, the axi_dmac can add t_dest and then one could use a TX and RX DMA attached to and AXIS interconnect for endless possibilities.

 

d) I am now looking at the examples but frankly I feel like a middle school student looking at differential equations

 

Thanks,

 

Edward

 

larscmhennerich

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