I use the AD5666 quad 16bit DAC in my application.
During my calibration routine (to calculate gain and offset error from the circuit) I see curios output voltage.
You see a extract from the calibration solution graph.
X-axis is the set value in Digits and the Y-axis is Output-Voltage in Volt
The incrementing is slowly (>500ms) but the SPI communication is fast.
I've a FPGA for serve all SPI components. The FPGA write every 20µs all channels.
The purple signal is the DAC-chip-select
(SPI Clock is 13.5MHz)
The sequence is Ch1 -> Ch2 -> Ch3 -> Ch4 -> Ch1 -> Ch2 -> ...
I write direct the channel with command 0x03 (write and update DAC Channel n)
The Pin LDAC is fix connected with ground.
Everybody have a idea, why I have this output characteristic?
I can manipulate this behavior with the update speed but not with the SPI clock speed.