I have several devices connected to one SPI port (ADF4002 and ADF4155 amongst others). Most of these devices require 32-bit SPI transfers for programming, therefore I would like to configure my SPI master to always execute 32-bit SPI transfers (i.e. pull LE low, send 32 clock pulses/bits and pull LE high again afterwards).
According to the datasheet the ADF4002 latches data when LE goes high. So I assume I can send any dumy data in the first 8 bitsand the real access data in the 24 following bits. Is this correct?
I ask to make sure none of the following things is the case:
- ADF4002 requires EXACTLY 24 clock pulses between LE going low and LE going high
- ADF4002 stops shifting in data after 24 clock pulses (i.e. I would have to apply data first and 8 dummy bits afterwards)
Unfortunately I don't have hardware available yet to measure the behavior.