AnsweredAssumed Answered

AD9129 - SED

Question asked by Pablo.Leyva on Aug 24, 2015
Latest reply on Sep 1, 2015 by danf

Hi everyone,

 

I´m trying to use the SED (Sample Error Detection) feature in the ad9129 DAC but I am facing some problems with the FRAME signal beeing ingnored.

 

The input data I am feeding in to the DAC is (in twos complement):

 

wave = 0x2001, 0x1FFF, 0x1FFF, 0x2001, 0x2001, 0x1FFF, 0x1FFF, 0x2001

 

That means that the LVDS signals are going to look like this:

 

P0      [13:00] =      0x2001,     0x1FFF,     0x2001,     0x1FFF

P1      [13:00] =      0x1FFF,     0x2001,     0x1FFF,     0x2001

FRM  [00:00] =      0x1,            0x0,            0x0,            0x0                        

 

But if I look at the readed data (register 0x52 to 0x57) I see the following pattern (I have configured the 'test pattern' in the DAC as 0x0000, 0x0000, 0x0000, 0x0000 so I am going to see readed value as error bits):

 

[R0H, R0L]     =      0x1FFF

[F0H, F0L]      =      0x2001

[R1H, R1L]     =      0x2001

[F1H, F1L]      =      0x1FFF


The DAC Is missing/ignoring the first 2 samples under the high state of the FRAME signal.

 

I am working on a VC707 Board with a custom FMC board attached. I have checked the signals in the FMC conector and the FRAME signals rises when it should.

I have tried rising the FRAME signal in all the diferents points of the transmision


FRM  [00:00] =      0x1,            0x0,            0x0,            0x0                        

FRM  [00:00] =      0x0,            0x1,            0x0,            0x0                        

FRM  [00:00] =      0x0,            0x0,            0x1,            0x0                        

FRM  [00:00] =      0x0,            0x0,            0x0,            0x1                        

 

but the DAC is always reading the same values.


I think could be a problem in the register configuration or maybe I am doing something wrong. My configuration routine is the following:

 

int32_t ad9129_SED_test_pattern(uint16_t R0, uint16_t R1, uint16_t F0, uint16_t F1)
{
  xil_printf("\n\r");
  xil_printf("START: SED TEST.\n\r");

    uint8_t reg;

       ad9129_spi_write(AD9129_REG_FIFO_OFFSET,  0x20);
       ad9129_spi_write(AD9129_REG_FIFO_CTRL,    0x21);
       ad9129_spi_write(AD9129_REG_FRAME_PIN_USAGE,  0x02);  // Configuring FRM pin as FRAME pin
       ad9129_spi_read(AD9129_REG_FRAME_PIN_USAGE, &reg);
       xil_printf("AD9129_REG_FRAME_PIN_USAGE: ");
       if ( (reg & 0x10) ){xil_printf("FRAME.  \n\r");}
       if ( (reg & 0x20) ){xil_printf("PARITY. \n\r");}

       ad9129_spi_write(AD9129_REG_PATT_ERR_R0L,                          (R0 >> 0) & 0xFF);
       ad9129_spi_write(AD9129_REG_PATT_ERR_R0H,                          (R0 >> 8) & 0x3F);

       ad9129_spi_write(AD9129_REG_PATT_ERR_R1L,                          (R1 >> 0) & 0xFF);
       ad9129_spi_write(AD9129_REG_PATT_ERR_R1H,                          (R1 >> 8) & 0x3F);

       ad9129_spi_write(AD9129_REG_PATT_ERR_F0L,                          (F0 >> 0) & 0xFF);
       ad9129_spi_write(AD9129_REG_PATT_ERR_F0H,                          (F0 >> 8) & 0x3F);

       ad9129_spi_write(AD9129_REG_PATT_ERR_F1L,                          (F1 >> 0) & 0xFF);
       ad9129_spi_write(AD9129_REG_PATT_ERR_F1H,                          (F1 >> 8) & 0x3F);

       ad9129_spi_write(AD9129_REG_IRQ_ENABLE_1,                          0x10); // Enable the IRQs.

       ad9129_spi_write(AD9129_REG_SED_CONTROL,                           0x80); // Enable the SED Test
       ad9129_spi_write(AD9129_REG_SED_CONTROL,                           0xC0); // Clear the SED Registers
       ad9129_spi_write(AD9129_REG_SED_CONTROL,                           0x80); // Enable the SED Test

       ad9129_spi_read(AD9129_REG_SED_CONTROL, &reg);

       if( (reg & 0x01) != 0 ) {
            xil_printf("Error: SED FAIL.\n\r");

            ad9129_spi_read(AD9129_REG_SED_CONTROL, &reg);
            xil_printf("AD9129_REG_SED_CONTROL (0x%x).\n\r", reg);

            R0 = 0; R1 = 0; F0 = 0; F1 = 0;


            ad9129_spi_read(AD9129_REG_PATT_ERR_R0H, &reg); R0 = (R0 << 0) | reg; //Loading the R0H - MSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_R0L, &reg); R0 = (R0 << 8) | reg; //Loading the R0L - LSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_R1H, &reg); R1 = (R1 << 0) | reg; //Loading the R1H - MSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_R1L, &reg); R1 = (R1 << 8) | reg; //Loading the R1L - LSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_F0H, &reg); F0 = (F0 << 0) | reg; //Loading the F0H - MSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_F0L, &reg); F0 = (F0 << 8) | reg; //Loading the F0L - LSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_F1H, &reg); F1 = (F1 << 0) | reg; //Loading the F1H - MSBs
            ad9129_spi_read(AD9129_REG_PATT_ERR_F1L, &reg); F1 = (F1 << 8) | reg; //Loading the F1L - LSBs


            xil_printf("AD9129_REG_PATT_ERR_R0 (0x%x).\n\r", R0);
            xil_printf("AD9129_REG_PATT_ERR_R1 (0x%x).\n\r", R1);
            xil_printf("AD9129_REG_PATT_ERR_F0 (0x%x).\n\r", F0);
            xil_printf("AD9129_REG_PATT_ERR_F1 (0x%x).\n\r", F1);

       }
       else {
             xil_printf("SED PASSED.\n\r");
       }


       return 0;
}

 

Am I doing something wrong running the test? Is the configuration Incomplete? I am re-reading the datasheet, but i cant find the issue.

 

-Pablo

Outcomes