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Glitches in AD9200's conversion results

Question asked by wouter on Aug 24, 2015
Latest reply on Aug 24, 2015 by TonyM

When I apply a nice and smooth (almost) fullscale sinewave to the AIN analog input of the AD9200 A/D-converter in my application, I observe massive glitches in the conversion results around the points where MSB bits are changing, e.g. around 0.5 fullscale, around 0.25 and 0.75 fullscale etc.





In an attempt to debug this issue, I've probed the two MSBs, D8 and D9, while applying a steady 0.5 fullscale DC level on AIN.
You would expect {D9,D8} to fluctuate between 01 and 10; the combinations 00 and 11 should not occur. To my astonishment, however, the combination 00 does occur, which means that for a 0.5 fullscale analog input signal, the conversion result sometimes yields a code below 0.25 fullscale.



(yellow = conversion clock, blue = D9 = MSB, red = D8 = MSB-1)


I've checked the integrity of the supplies and supply decoupling.

The AD9200 is connected as follows:







CLK=5.33MHz square wave, but I've also tried higher and lower clock frequencies with the same problem

So, the AD9200 is in top/bottom mode, configured to measure between 0 and 1V,  and fed with a 0.5V DC level at AIN