Intend to use ADAU7002 for SSI (TDMA) 6 slots (16 KHz, 32Bits, 6 Slots, 3.072 MHz clock), will this device support it?
I want to be certain about terminology. Can you explain exactly what you mean by SSI?
Also when you say 32 bits are you meaning 32 Bit Clock (BCLK) transitions per audio slot?
The actual audio will always be 20 bits of audio with the remaining 12 bits of the 32 bit slot will be tri-stated. Should you feed this into a system that is expecting 32 bit audio then it will work as long as the tri-stated bits are read as zeros.
So with what I said above then the answer is yes, it will support a 6 slot TDM signal at 16kHz LRCLK rate. The BCLK rate will be LRCLK x 32 x 6 = 192x LRCLK and that is supported. Note, that the TDM format will always be with a one BCLK cycle delay from the LRCLK rising edge. Figure 13 in the datasheet has an error which will be corrected soon. The timing is the same as I2S from the LRCLK edge.
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