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The bug in AD9643 HDL core in ZC706 + FMCOMMS1 project

Question asked by Thang on Aug 18, 2015
Latest reply on Aug 19, 2015 by CsomI

Hi all,


I am building the ZC706 + FMCOMMS1 HDL project. I am using 2 IP “AXI_AD9643” to implement MIMO. However,  I got error like this:

1.jpg

 

After I fixed by this solution

 

set_property -dict [list CONFIG.PCORE_IODELAY_GROUP {adc_if_delay_group}] $axi_ad9643_0

set_property -dict [list CONFIG.PCORE_IODELAY_GROUP {adc_if_delay_group}] $axi_ad9643_1

 

on file XDC constrain.

 

I meet another issue, as following:

2.jpg

 

Could you find solution for this.

 

Thank you a lot.


Sincerely,

Thang.

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