We want to lay out a PCB using multiple AD9361 chips and run them in either FDD or RX modes.
We are happy to control the ENSM using SPI. Initially we thought that this meant we don't have
to route the TXNRX and ENABLE signals to the AD9361 chip. However later we were concerned that
controlling the ENSM using SPI will mean that different chips will transition into the FDD or RX mode at
different times which may affect the data synchronization coming out of the chips. On the other hand, using
common TXNRX and ENABLE signals could ensure all the chips transition into FDD and RX modes
on the same clock edge, Is this important for data synchronization ?
The main question thus is, do we need to use the TXNRX, ENABLE and FB_CLK signals if we want
the data (and frame signal) on multiple D9361 chips to be synchronized in either FDD or RX modes ?
Also is it necessary to route the FB_CLK signal if we only want to use the AD9361 in RX mode.