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Using the AD9361 with a sample rate of 250ksps

Question asked by Quamstar on Aug 14, 2015
Latest reply on Aug 24, 2015 by larsc
Branched from an earlier discussion

Hey Folks,


I trying to use a sample rate of 250ksps. Using the FIR Filter Wizard and enable those filter on the AD9361 returns into an error:


ad9361_calculate_rf_clock_chain: Failed to find suitable dividers: ADC clock below limit


Any ideas regarding this issue?


Thanks and regards