I'm targeting the FMCOMMS2 design with the standard unmodified axi_ad9361 FPGA IP, and I've set the IP's PCORE_ID = 1. What can be done to make the ad9361_dig_tune() function in ad9361_conf.c work?
I understand that the driver uses the axiadc_read(st, ADI_REG_ID) call to find the value of PCORE_ID. I have verified this. However, I can't understand how the ad9361_dig_tune() function knows about it - there's no call to read the contents of 0x79020004 - aka ADI_REG_ID. Hence, why does the tuning function fail?